The importance of a Schematic/Layout Review
Why are Schematic and Layout Reviews required?
Ask any hardware engineer, who has developed many PCB's and they will say one of the most effective tools they have available to them is to have an independent design review.
A formalized design review with a process-based checklist allows for additional confidence before proceeding to the expensive fabrication process. At Convergence, we always incorporate a Schematic and PCB review for our clients. Here are a few examples of common items to review during detailed design review.
-DRC (Any single point nets or misnamed nets are typically the most commonly)
-Power Analysis (Voltage tolerance, Min/Max Rails, loading, Noise, DCR, Sequencing, Capacitance, Plane/Pour, etc.)
-Clocking and Reset structure (Does the design meet the Microprocessors minimum clocking requirements). We always recommend a SYS reset along with an independent reset controller to hold each major device in reset for debug/testing purposes.
ProTip: Always keep Reset lines away from noisy tracks.
-Connectors (Ensure proper mechanical and pinout alignment).
-High speed digital Signal Integrity. DDR4, SerDes, PCIe, GbE, etc. all require critical PCB design rules (impedance, cross talk, length matching, via structure, lane definition) that should be controlled by a PCB constraint manager and verified in layout. We typically start with a standard impedance program and then optimize with the final PCB vendor.
Pro Tip. You can define High speed track thicknesses to Track+0.1 thou to allow the PCB board shops to easily find the impedance-controlled signals for their processing.
-Application notes / Errata’s - Many companies provide such valuable guidance from simulation profiles to schematic/layout implementation rules to adhere to. This is one of the most effective ways to cross verify implementation of complex circuitry. On many microprocessors there are additional errata available to see if there are any HW/SW workarounds for known issues.
-Translation circuitry. When connecting multiple logic ensure all devices are compatible signal strength (TTL, CMOS, LVTTL, ECL, etc.)
- PCB layer stack up. A well balanced PCB layer stack up is critical for Signal Integrity, Power distribution and EMI performance.
-Design for Manufacturing & Test (Test Point coverage, TP size & clearance, Copper and component edge clearances for de-panalization, component clearances by pin type and package height).
- Standard PCB fabrication (Tooling, fiducials, footprints, Solder Mask, Paste).,
- Mechanical STEP file verification. Ensure keep outs and alignment.
We have completed countless reviews over the years to help our clients achieve first pass success. Contact us for all your engineering support needs.